[llvm-dev] RFC/bikeshedding: Separation of instruction and pattern definitions in LLVM backends

[Alex Bradbury via llvm-dev]

On 18 August 2017 at 15:24, Jacques Pienaar <jpienaar at google.com> wrote:
> The 2nd approach does seem nicer: separates concerns, makes it easier to
> extend (especially important given RISC-V's modular ISA). Although, as David
> said, both seem pretty clean. One thing I would add is not too worry about
> the conciseness too much initially: I have been "too clever" before when
> trying to write concise tablegen definitions, only to find that it
> needlessly complicated making changes and made it difficult to follow.
> Refactoring it to be more concise from a clear base is easier than the
> opposite IMHO.

I fully agree. Avoiding excessive verbosity, is useful, but trying to
"code golf" a backend description with ever more complex tablegen
magic isn't. If anything in the RISCV backend looks like it's getting
a bit too clever, please do call me out on it. Sometimes defining a
new class or multiclass can save a lot of repetition, though in these
cases so far I've been able to keep the class/metaclass definition
very close to the use so it's easy to understand what the following
definitions do without jumping about lots of different files.

Best,

Alex