[llvm-dev] How to debug instruction selection

[Krzysztof Parzyszek via llvm-dev]

I forgot to add: in this case, the first argument to the call is 
"CopyToReg", and then the function to call. I don't know if that's the 
correct order, but make sure that all arguments are where they should be.

-Krzysztof


On 8/15/2017 7:44 AM, Krzysztof Parzyszek via llvm-dev wrote:
> The line
>    0x28ec830: ch,glue = X86ISD::CALL 0x28ec7c0, 0x28ef900, Register:i32 
> %EDI, Register:i8 %AL, RegisterMask:Untyped, 0x28ec7c0:1
> shows a DAG node in the typical debugging output. The first part 
> (0x28ec830) is the address of that node. Each node can produce multiple 
> values, and the "ch,glue" is the list of types of the produced value: in 
> this case it's a chain and a glue. Then there is the opcode 
> (X86ISD::CALL), and then the list of arguments. Most arguments are 
> printed as addresses of the nodes, but some are printed inline, like 
> "Register:i32 %EDI". In a typical case, like "0x28ec7c0" the address by 
> itself indicates the 0-th value produced by that node. If some other 
> value is used, the index of that value will be given as :N, as in 
> "0x28ec7c0:1". The node 0x28ec7c0 also produces a chain and a glue: the 
> address by itself refers to the 0-th value, i.e. the chain, and the :1 
> refers to the glue.
> The other lines show the nodes used as arguments, and their arguments, etc.
> 
> If you want to debug the actual instruction selection, add [-mllvm] 
> -debug-only=isel to the command line. I'm not sure how to enable it with 
> JIT (maybe hardcode the debug flag to "true" by hand). It will print the 
> initial DAG as well as the DAG after various steps of 
> legalization/combining. Most importantly (from your perspective), it 
> will print the steps of instruction selection. The instruction selection 
> is done "backwards", i.e. from the last instruction in the basic block 
> upwards. More precisely, it happens from the root node, through the 
> intermediate nodes up to the leaves.
> 
> The debug output will have lines like "match failed at 12345, continuing 
> at 23456". The numbers correspond to the steps in the DAG matcher, which 
> is auto-generated from the .td files by TableGen. In the build 
> directory, TableGen has created a file <Target>GenDAGISel.inc. It 
> implements the function "SelectCode", that has a long array 
> (MatcherTable) of matcher commands like OPC_CheckType. The comments at 
> the beginning of each line contain the number of the step implemented by 
> that line.
> 
> When you see "match failed at NNNNN", the step "NNNNN" is usually some 
> kind of a check, like OPC_CheckOpcode, or OPC_CheckPredicate. The .inc 
> file will have the expected opcode, or the name of the predicate being 
> checked, so you can see what check exactly was performed at that step.
> 
> -Krzysztof
> 
> 
> On 8/15/2017 2:58 AM, Alex Denisov via llvm-dev wrote:
>> Hi there,
>>
>> I try to JIT compile some bitcode and seeing the following error:
>>
>> LLVM ERROR: Cannot select: 0x28ec830: ch,glue = X86ISD::CALL 
>> 0x28ec7c0, 0x28ef900, Register:i32 %EDI, Register:i8 %AL, 
>> RegisterMask:Untyped, 0x28ec7c0:1
>>    0x28ef900: i32 = X86ISD::Wrapper TargetGlobalAddress:i32<void (i8*, 
>> ...)* @_ZN5FooBr7xprintfEPKcz> 0
>>      0x28ec520: i32 = TargetGlobalAddress<void (i8*, ...)* 
>> @_ZN5FooBr7xprintfEPKcz> 0
>>    0x28ec670: i32 = Register %EDI
>>    0x28ec750: i8 = Register %AL
>>    0x28ec360: Untyped = RegisterMask
>>    0x28ec7c0: ch,glue = CopyToReg 0x28ec6e0, Register:i8 %AL, 
>> Constant:i8<0>, 0x28ec6e0:1
>>      0x28ec750: i8 = Register %AL
>>      0x28ec600: i8 = Constant<0>
>>      0x28ec6e0: ch,glue = CopyToReg 0x28ec590, Register:i32 %EDI, 
>> 0x28ef820
>>        0x28ec670: i32 = Register %EDI
>>        0x28ef820: i32 = X86ISD::Wrapper TargetGlobalAddress:i32<[47 x 
>> i8]* @.str> 0
>>          0x28ec910: i32 = TargetGlobalAddress<[47 x i8]* @.str> 0
>> In function: _ZN5FooBr10initSystemEv
>>
>> I have some assumptions about this particular error.
>> What is not clear to me is: how am I supposed to read this error 
>> message? I.e. what to look at to make some sense out of it?
>>
>> P.S. I have zero knowledge about instruction selection, so any 
>> suggestions on where I can get this knowledge are more than welcome.
>> -- 
>> AlexDenisov
>> Software Engineer, https://lowlevelbits.org
>>
>>
>>
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>>
> 

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