[llvm-dev] Is there a way to correlate operation to machine instruction?

Ryan Taylor via llvm-dev llvm-dev at lists.llvm.org
Fri Apr 14 07:46:53 PDT 2017


Is it possible to insert duplicate SDNodes prior to ISel (preferably during
and directly before selection) that won't be CSE'd out?

Thanks.

On Wed, Apr 12, 2017 at 2:24 PM, Matt Arsenault <Matthew.Arsenault at amd.com>
wrote:

> On 04/12/2017 11:07 AM, Ryan Taylor wrote:
>
>> Matt,
>>
>>   so in AMDGPU, the operands are sort of 'generic'? Can you point me to
>> the right places?
>>
>> Thanks.
>>
> Not exactly generic, but they have custom defined constraints. Look at the
> definitions for the VSrc_* operand types in SIRegisterIno.td. These set the
> OperandType on the Operand to a custom enum, and the target
> verifyInstruction checks the custom constraints.
>
> -Matt
>
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