[llvm-dev] Reg units for unaddressable register parts?

Krzysztof Parzyszek via llvm-dev llvm-dev at lists.llvm.org
Wed Sep 28 18:41:53 PDT 2016

On 9/28/2016 7:30 PM, Quentin Colombet wrote:
> I am not sure I see any use case, especially because I would not rely on the semantic we have for the target instructions.
> E.g.,
> RAX = …
> EAX = … <— Does this definition clobber the high part of RAX?

Short reply right now, regarding this:

Thanks, that didn't occur to me. According to the Intel documentation, 
moving into a 32-bit register zero-extends the value to 64 bits. So in 
the example above, EAX=... would indeed overwrite the high half of RAX.

It seems that targeting any part of the lowest 16 bits (or all of them) 
preserves the rest, while changing the second-lowest 16 bits (16..31) 
does affect bits 32..63.


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