[llvm-dev] Incompatible type assertion from llvm-tblgen

[Phil Tomson via llvm-dev]

I'm getting this incompatible type assertion when I run tblgen on my .td
files:

llvm/include/llvm/Support/Casting.h:237: typename llvm::cast_retty<X,
Y*>::ret_type llvm::cast(Y*) [with X = llvm::DefInit; Y = llvm::Init;
typename llvm::cast_retty<X, Y*>::ret_type = llvm::DefInit*]: Assertion
`isa<X>(Val) && "cast<Ty>() argument of incompatible type!"' failed.

Looks like the incompatible types are DefInit and Init. The offending line
is in this definition:

class LoadOpIdx< bits<7> op,
                   string instr_asm,
                   OperandInfo info,
                   InstrItinClass itin=II_LOAD1_RR >
    //
    // load: r1 = mem[r2 + (r3 << sizeof(operand) ]
    //
    : FR3< op,
        (outs info.regClass:$r1),
        (ins ADDR_SHLI:$addr),  //<<-this line causes assert
        instr_asm # "\t\t$r1, $addr, " # info.sizeStr,
        [(set info.regClass:$r1, (load ADDR_SHLI:$addr))],
        itin > {
       }

The other related definitions are:

// This class provides load/store address format selection support
//
class Addr< int numArgs, string funcName, dag opInfo >
  : Operand<i64>,
    ComplexPattern< i64, numArgs, funcName, [], [SDNPWantParent] > {
      let MIOperandInfo = opInfo;
    }

let PrintMethod = "printMemOperand" in {
  def ADDR_RR : Addr< 2, "SelectAddrRegReg",
                      (ops GPRC:$base, GPRC:$offsetreg) >;
  def ADDR_RI : Addr< 2, "SelectAddrRegImm",
                      (ops GPRC:$base, i64imm:$offsetimm) >;
  def ADDR_SHLI : Addr< 2, "SelectAddrShlImm",
                      (ops GPRC:$base, ( shl GPRC:$offsetreg, (i64 3))) >;
}


If I change the LoadOpIdx definition to:

class LoadOpIdx< bits<7> op,
                   string instr_asm,
                   OperandInfo info,
                   InstrItinClass itin=II_LOAD1_RR >
    //
    // load: r1 = mem[r2 + (r3 << sizeof(operand) ]
    //
    : FR3< op,
        (outs info.regClass:$r1),
        (ins ADDR_RR:$addr),  //<<-this is fine
        instr_asm # "\t\t$r1, $addr, " # info.sizeStr,
        [(set info.regClass:$r1, (load ADDR_SHLI:$addr))],
        itin > {
       }

I'm not sure what the difference is between the ADDR_RR and ADDR_SHLI defs
that's causing this - any ideas?  Is the DAG portion for ADDR_SHLI ok?
((ops GPRC:$base, ( shl GPRC:$offsetreg, (i64 3))))

Phil
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