[llvm-dev] Basic Jump indirect
Gschwandtner Georg - S1310567008 via llvm-dev
llvm-dev at lists.llvm.org
Mon Sep 5 12:39:16 PDT 2016
Hallo,
I am trying to build a backend for a simple 16-bit CPU with a very small instruction set of only 24 instructions called PROL16 is used to teach CPU architecture and chip design.
I am using Fraser Cormack and Pierre-Andre Saulais LEG CPU (https://github.com/frasercrmck/llvm-leg) as starting point.
I do struggle with the concept of indirect loads and jumps where the address to jump has to be save in an register first.
So my jump looks like this:
jump r3
where register r3 is containing the address to jump to.
When I change the InstrInfo.td from a direct jump like this:
let isTerminator = 1, isBranch = 1, isBarrier = 1 in {
def B : InstLEG<(outs), (ins b_target:$dst),
"b $dst", [(br bb:$dst)]> {
bits<24> dst;
let Inst{31-28} = 0b0000;
let Inst{27-24} = 0b1010;
let Inst{23-0} = dst;
}
}
to register based like:
def SDT_LEGJmpLink : SDTypeProfile<0, 1, [SDTCisVT<0, iPTR>]>;
def LEGJmpLink : SDNode<"LEG::B",SDT_LEGJmpLink,
[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
SDNPVariadic]>;
let isTerminator = 1, isBranch = 1, isBarrier = 1 in {
def B : InstLEG<(outs), (ins GRRegs:$Ra, variable_ops),
"JUMP", [(LEGJmpLink GRRegs:$Ra)]> {
bits<24> dst;
let Inst{31-28} = 0b0000;
let Inst{27-24} = 0b1010;
//let Inst{23-0} = dst;
}
}
def : Pat<(LEGJmpLink (i32 tglobaladdr:$dst)),
(B tglobaladdr:$dst)>;
def : Pat<(LEGJmpLink (i32 texternalsym:$dst)),
(B texternalsym:$dst)>;
This is used in CPU0, MIPS and LEG for call.
When I translate my test IR code LLVM is unable to match the Branch.
LLVM ERROR: Cannot select: 0x9f32948: ch = br 0x9f32504, 0x9f328ac [ORD=13] [ID=20]
In function: _Z17test_add_overflowv
I clearly do not understand how the concept for loading an address to a register works in LLVM.
For some insights I would be very thankful.
BR
Georg
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