[llvm-dev] LLVM backend -- Avoid base+index address mode for X86

[Hong Hu via llvm-dev]

Thanks.

Found some related code in Native Client implementation.

It mainly hacks the X86DAGToDAGISel::matchAddressBase to assign the SDNode
to the index register, instead of using base register first. Other hacks
try to avoid assign SDNode to base register.

I'm still checking Native Client's implementation. Will check the
X86TargetLowering::isLegalAddressingMode.

Regards,
Hu Hong

On 18 October 2016 at 11:24, Jingyue Wu <jingyue at google.com> wrote:

> Maybe modify X86TargetLowering::isLegalAddressingMode to make base+index
> illegal?
>
> On Sun, Oct 16, 2016 at 7:51 PM, Hong Hu via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> Hi All,
>>
>> I have a question regarding LLVM backend. I appreciate a lot if anyone
>> can provide some hints.
>>
>> My work here is to avoid base+index address mode for X86 target, to allow
>> base-register only or index-register only address mode. For example,
>> "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not
>> allowed.
>>
>> I understand LLVM backend is a complex system. Can any one help point out
>> which subsystem I should look into to solve my question?
>>
>> Regards,
>> Hu Hong
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> llvm-dev at lists.llvm.org
>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>>
>>
>
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