[llvm-dev] LLVM backend -- Avoid base+index address mode for X86

[Bruce Hoult via llvm-dev]

For experimental purposes, you should be able to just go
into lib/Target/X86 and remove the patterns in .td files (or maybe some
.cpp .. I'm not familiar with the X86 mechanisms) that map to base+index
addressing modes.

Then the compiler will automatically use some extra temporary register to
calculate intermediate addresses.

On Mon, Oct 17, 2016 at 5:51 AM, Hong Hu via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hi All,
>
> I have a question regarding LLVM backend. I appreciate a lot if anyone can
> provide some hints.
>
> My work here is to avoid base+index address mode for X86 target, to allow
> base-register only or index-register only address mode. For example,
> "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not allowed.
>
> I understand LLVM backend is a complex system. Can any one help point out
> which subsystem I should look into to solve my question?
>
> Regards,
> Hu Hong
>
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