[llvm-dev] Semantics of MachineInstr::findRegisterUseOperandIdx
Quentin Colombet via llvm-dev
llvm-dev at lists.llvm.org
Tue Oct 4 15:35:19 PDT 2016
Hi Fraser,
I think we want stick to being explicit about what the method does:
- No TRI, whole Reg
- TRI, Reg or super Reg
I.e., no magic aliases check unless we asked for.
You are right that we miss the any part of Reg option here. If adding an Overlap flag like we have for the Defs works for you, I would say, that’s the way to go.
I am surprised we didn’t need it sooner.
Cheers,
-Quentin
> On Oct 4, 2016, at 4:00 AM, Fraser Cormack via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi,
>
> I was wondering what MachineInstr::findRegisterUseOperandIdx "means". I have a situation where an instruction writes R0 and another reads R0lo - the lower half of R0. Using Use::findRegisterUseOperandIdx(R0) returns -1, because it only checks against exact matches and "is-Reg-a-subreg-of-MOReg" matches, of which neither are true.
>
> However, the instruction reads _part_ of R0, so should it return true? It's really a question of semantics, as either:
>
> 1) findRegisterUseOperandIdx returns the index if the instruction reads the whole of Reg, or
> 2) findRegisterUseOperandIdx returns the index if the instruction reads any part of Reg
>
> If it's 2) then it appears as if there's a bug in there. If it's 1) by design, then it doesn't seem to me as though there's a convenient way of doing 2).
>
> There is another option, namely:
>
> 3) findRegisterUseOperandIdx can do 1) or 2), depending on a flag
>
> There's an "Overlap" parameter to MachineInstr::findRegisterDefOperandIdx - would that do the trick, and do we want to add it to findRegisterUseOperandIdx?
>
> What do people think?
>
> Cheers,
> Fraser
> --
> Fraser Cormack
> Staff Software Engineer, Compilers
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