[llvm-dev] Special vselect code generation case using TableGen

[Alex Susu via llvm-dev]

     Can I specify in TableGen a match pattern where I replace
d    VSELECT with 4 machine instructions?
   But the reason I'm not using it is:
     - the fact I don't know how to handle the type of the predicate vector
     - the fact I need to chose various WHEREEQ/CRY/LT .

NOTE: From all back ends only LEG uses explicit pattern i.e., Pattern<>.
     def : Pattern<(i32 (load_sym tglobaladdr:$addr)),  [(MOVi32 $addr)]>;




   Hello.
     I want to implement in TableGen code generation for vselect for the Connex research 
SIMD processor. The problem is that my SIMD processor does not have a vselect instruction 
and therefore we need to use the other existing instructions. More exactly, if we have in 
LLVM IR a program like this:
       %pred = cmp eq %op1, %op2
       %vres = vselect %pred, %if_set, %if_clear
     we can implement it in Connex like this:
       EQ op1, op2
       Rdst = Rif_clear
       WHEREEQ
         Rdst = Rif_set
       ENDWHERE

     Normally TableGen allows specifying single instructions that match part of a given DAG.
     But in include/llvm/Target/TargetSelectionDAG.td it is given  the possibility to 
match a given DAG node with several target nodes by using Pattern<> records:
     // Selection DAG Pattern Support.
     // Patterns are what are actually matched against by the target-flavored
     // instruction selection DAG.  Instructions defined by the target implicitly
     // define patterns in most cases, but patterns can also be explicitly added when
     // an operation is defined by a sequence of instructions (e.g. loading a large
     // immediate value on RISC targets that do not support immediates as large as
     // their GPRs).
     //
     class Pattern<dag patternToMatch, list<dag> resultInstrs> {
       dag             PatternToMatch  = patternToMatch;
       list<dag>       ResultInstrs    = resultInstrs;
       list<Predicate> Predicates      = [];  // See class Instruction in Target.td.
       int             AddedComplexity = 0;   // See class Instruction in Target.td.
     }

   // From MispMSAInstrInfo.td: (vselect cond, if_set, if_clear)
   def : Pattern<(set MSA128BOpnd:$wd, (vselect (MSA128BOpnd:$pred), 
(MSA128BOpnd:$ws_true), MSA128BOpnd:$ws_false)),
                 [ // assign value $ws_false to vregx, which keeps the result of vselect - 
use CopyToReg
                  (WHEREEQ), // no inputs, no outputs
                   // assign value $ws_true to vregx,  which keeps the result of vselect - 
use CopyToReg
                  (ENDWHERE) // no inputs, no outputs
                 ]
                 >;

     I'm having difficulties in specifying this TableGen Pattern.
     For example, does the "set" TableGen pattern operation specify CopyToReg?

   Thank you,
     Alex