[llvm-dev] how to prevent LLVM back-end from reordering instructions at instruction scheduling?

[Krzysztof Parzyszek via llvm-dev]

You can override TargetInstrInfo::isSchedulingBoundary for that.

-Krzysztof

On 11/15/2016 4:13 PM, Ryan Taylor wrote:
> I have the same issue, would it be easier and more useful to attach a
> flag to the instruction to tell the scheduler not to move instructions
> across this boundary?
>
> -Ryan
>
> On Tue, Nov 15, 2016 at 5:11 PM, Krzysztof Parzyszek via llvm-dev
> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>
>     You can create a DAG mutation that adds artificial dependencies
>     between A, B and Z.
>
>     -Krzysztof
>
>
>     On 11/15/2016 3:26 PM, Wei Ding via llvm-dev wrote:
>
>         Hello,
>
>         I have a LLVM backend question regarding how to prevent compiler
>         from
>         reordering instructions. For example, I have the following
>         instructions.
>         Z_instruction is the one which I want to insert.
>
>
>         // instruction order which I am looking for
>         /////////////////////////////////////////
>         A_instruction
>         B_instruction
>
>         *Z_instruction*
>
>         C_instruction
>         D_instruction
>         E_instruction
>         F_instruction
>
>         *Z_instruction*
>
>         G_instruction
>         F_instruction
>
>
>         ==================================================
>
>         But I found compiler reordered those instructions like the
>         following.
>         How could I prevent compiler from moving *A_instruction* and
>         *B_instruction* after the first *Z_instruction*? Any
>         recommendations and
>         suggestion are greatly appreciated here!!!
>
>         *Z_instruction*
>         *
>         *
>         A_instruction
>         B_instruction
>
>         C_instruction
>         D_instruction
>         E_instruction
>         F_instruction
>
>         *Z_instruction*
>
>         G_instruction
>         F_instruction
>
>         BTW, I have define input/output chain for : *C_instruction,
>         D_instruction, E_instruction, F_instruction and Z_instruction*
>         *
>         *
>         Thank you so much!
>
>         --
>         Wei Ding
>
>
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