[llvm-dev] Liveness of AL, AH and AX in x86 backend

[Krzysztof Parzyszek via llvm-dev]

I changed the triple to i386 and the CPU to pentium, but I still didn't 
get the good code.

foo:                                    # @foo
         .cfi_startproc
# BB#0:                                 # %entry
         movl    4(%esp), %eax
         movb    (%eax), %dl
         movzbl  1(%eax), %ecx
         movb    %dl, z
         movb    %cl, z+1
         incb    %dl
         shll    $8, %ecx
         movzbl  %dl, %eax
         orl     %ecx, %eax
         retl

-Krzysztof


On 5/24/2016 11:09 AM, Smith, Kevin B wrote:
> Try using x86 mode rather than Intel64 mode.  I have definitely gotten it to use both ah and al in 32 bit x86 code generation.
> In particular, I have seen that in loops for both the spec2000 and spec2006 versions of bzip.  It can happen, but it does only rarely.
>
> Kevin Smith
>
>> -----Original Message-----
>> From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of
>> Krzysztof Parzyszek via llvm-dev
>> Sent: Tuesday, May 24, 2016 8:04 AM
>> To: LLVM Dev <llvm-dev at lists.llvm.org>
>> Subject: [llvm-dev] Liveness of AL, AH and AX in x86 backend
>>
>> I'm trying to see how the x86 backend deals with the relationship
>> between AL, AH and AX, but I can't get it to generate any code that
>> would expose an interesting scenario.
>>
>> For example, I wrote this piece:
>>
>> typedef struct {
>>   char x, y;
>> } struct_t;
>>
>> struct_t z;
>>
>> struct_t foo(char *p) {
>>   struct_t s;
>>   s.x = *p++;
>>   s.y = *p;
>>   z = s;
>>   s.x++;
>>   return s;
>> }
>>
>> But the output at -O2 is
>>
>> foo:                                    # @foo
>>         .cfi_startproc
>> # BB#0:                                 # %entry
>>         movb    (%rdi), %al
>>         movzbl  1(%rdi), %ecx
>>         movb    %al, z(%rip)
>>         movb    %cl, z+1(%rip)
>>         incb    %al
>>         shll    $8, %ecx
>>         movzbl  %al, %eax
>>         orl     %ecx, %eax
>>         retq
>>
>>
>> I was hoping it would do something along the lines of
>>
>>   movb (%rdi), %al
>>   movb 1(%rdi), %ah
>>   movh %ax, z(%rip)
>>   incb %al
>>   retq
>>
>>
>> Why is the x86 backend not getting this code?  Does it know that AH:AL =
>> AX?
>>
>> -Krzysztof
>>
>>
>>
>> --
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