[llvm-dev] [BUG] Mismatch between assembler & disassembler of X86 RIP-relative instruction

Quentin Colombet via llvm-dev llvm-dev at lists.llvm.org
Mon May 23 09:42:53 PDT 2016


Hi Jun,

Could you file a PR please?

Thanks,
-Quentin
> On May 22, 2016, at 11:54 PM, Jun Koi via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> 
> 
> On Mon, May 23, 2016 at 2:44 PM, Jun Koi <junkoi2004 at gmail.com <mailto:junkoi2004 at gmail.com>> wrote:
> Hi,
> 
> I found a mismatch between assembler & disassembler of X86: I assembled an instruction, then disassembled the output, but the result is not the same as the first original code: "add qword ptr [205163983024656], 1" vs " add qword ptr [1985229328], 1"
> 
> Anybody knows what is wrong?
> 
> Thanks.
> 
> 
> $ echo "ADD QWORD PTR [0xba9876543210], 0x1"|llvm-mc -assemble -triple=x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding           
>     add    qword ptr [205163983024656], 1 # encoding:[0x48,0x83,0x04,0x25,0x10,0x32,0x54,0x76,0x01]
> 
> $ echo "0x48,0x83,0x04,0x25,0x10,0x32,0x54,0x76,0x01"|llvm-mc -disassemble -triple=x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding
>     add    qword ptr [1985229328], 1 # encoding: [0x48,0x83,0x04,0x25,0x10,0x32,0x54,0x76,0x01] 
> 
> To make it more clear, here is the same thing again, but with hexa immediate. You can see the difference in memory address: 0xba9876543210 vs 0x76543210.
> 
> 
> $ echo "ADD QWORD PTR [0xba9876543210], 0x1"|llvm-mc -assemble -triple=x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding -print-imm-hex
>     .text
>     add    qword ptr [0xba9876543210], 0x1 # encoding: [0x48,0x83,0x04,0x25,0x10,0x32,0x54,0x76,0x01]
> 
> 
> $ echo "0x48,0x83,0x04,0x25,0x10,0x32,0x54,0x76,0x01"|llvm-mc -disassemble -triple=x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding -print-imm-hex
>     .text
>     add    qword ptr [0x76543210], 0x1 # encoding: [0x48,0x83,0x04,0x25,0x10,0x32,0x54,0x76,0x01]
> 
> 
> 
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