[llvm-dev] Instruction selection pattern for intrinsic returning llvm_any_ty

[Matt Arsenault via llvm-dev]

> On Mar 30, 2016, at 11:43, Mikael Holmén <mikael.holmen at ericsson.com> wrote:
> 
> Hi,
> 
> On 03/30/2016 11:38 AM, Matt Arsenault wrote:
>> 
>>> On Mar 30, 2016, at 11:35, Mikael Holmén <mikael.holmen at ericsson.com
>>> <mailto:mikael.holmen at ericsson.com>> wrote:
>>> 
>>> i16 (divm16_pseudo …)
>>> 
>>> stuff?
>>> 
>>> I've tried
>>> (i16, i16 (divm16_pseudo i16:$src1, i16:$src2)
>>> and
>>> ((i16, i16) (divm16_pseudo i16:$src1, i16:$src2)
>>> and a few other variants without managing to get it through.
>>> 
>>> Thanks again,
>>> Mikael
>> 
>> Are you trying to return multiple values?
> 
> Yes, the intrisic returns a record
> 
>  %rec6 = type { i16, i16 }
> 
> so at instructions selection the original call
> 
>  %_tmp3 = call %rec6 @llvm.phx.divm.u16.rec6(i16 %_tmp1, i16 %_tmp2)
> 
> has been lowered to
> 
>  t6: i16,i16 = llvm.phx.divm.u16 TargetConstant:i16<3778>, t2, t4
> 
> and the instruction I want to select also returns two values
> 
> def divm16_pseudo : MyPseudoInst<
>    (outs aNh_0_7:$dst, aNh_0_7:$dst2),
>    (ins aNh_0_7:$src1, aNh_0_7:$src2)>;
> 
> Both outs are i16.
> 
> /Mikael
> 

The intrinsic itself should define multiple IR outputs rather than using any ty. I’m also not sure if tablegen currently supports patterns with multiple results

-Matt