[llvm-dev] lowering of BUILD_VECTOR

[Rail Shafigulin via llvm-dev]

i'm having difficulty in understanding the BUILD_VECTOR instruction and how
to lower it to the an actual ISA. i looked at other targets but wasn't
quite able to figure it out. would someone be able to dumb it down for me?
assume i have an insert element instruction which inserts an element from a
GPR to a Vector Register at a given index, i..e

vset <vector register> <gpr> <index>

at the moment my target only supports v4i32.

a comment for BUILD_VECTOR in the ISDOpcodes.h "says" the following:
/// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
/// specified, possibly variable, elements.

my questions are:
1. what are those elements?
2. i presume that elements can be of different types, i.e. register,
immediate, something else (don't know what). am i correct?
3. will the handling of BUILD_VECTOR if the inputs are of different types?

a concrete example would really help.

any help on this is really appreciated.

-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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