[llvm-dev] Immediate operand for load instruction, in back end
RCU via llvm-dev
llvm-dev at lists.llvm.org
Fri Mar 18 02:44:29 PDT 2016
Hello,
I'm trying to define in my new back end, in MyBackendInstrInfo.td file, a vector load
instruction that takes an immediate address operand. (I got inspired from Mips' MSA SIMD
extensions.)
Could you please tell me what's the right way to do it?
Here, the load class has $addrsrc which is a relative address with base a certain
register and offset:
class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
ValueType TyNode, RegisterOperand ROWD,
Operand MemOpnd = mem_msa,
ComplexPattern Addr = addrimm10,
InstrItinClass itin = NoItinerary> {
dag OutOperandList = (outs ROWD:$wd);
dag InOperandList = (ins MemOpnd:$addrsrc);
string AsmString = !strconcat("mov $wd, ($addrsrc)");
list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addrsrc)))];
InstrItinClass Itinerary = itin;
string DecoderMethod = "DecodeMSA128Mem";
}
class LD_D_DESC : LD_DESC_BASE<"ldvd", load, v32i16, MSA128DOpnd>;
I've tried to change mem_msa to hold only let MIOperandInfo = (ops simm10) but there
are problems it seems:
// MSA specific address operand
def mem_msa : mem_generic {
let MIOperandInfo = (ops ptr_rc, simm10);
let EncoderMethod = "getMSAMemEncoding";
}
Could you please tell me what is the simplest way to define in LD_DESC_BASE a $addrsrc
that is just an immediate value like i16 or i16imm?
Thank you very much,
Alex
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