[llvm-dev] Soft FPU support for SPARC

James Knight via llvm-dev llvm-dev at lists.llvm.org
Mon Mar 7 12:18:13 PST 2016


> On Mar 7, 2016, at 11:22 AM, Kanad Sinha via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> 
> Hi,
> 
> I have recently started messing around with LLVM for a project on the SPARC architecture (SPARC32 V8, based off the Leon3 platform, to be more specific).
> 
> I was wondering about the status of the support for software-emulation of FPU operations. From preliminary browsing of code and this <http://reviews.llvm.org/D10457> commit review, it seems that currently there is none. Would that be right? If so, could someone please shed some light on what the plans are regarding its development in the near future? I wouldn't mind helping out if this is in the works right now.

LLVM doesn't support a soft-float ABI for Sparc. (I've not heard anyone say they're working on it either). 

You can do software emulation of the FPU instructions with the standard hard-float ABI -- that'd require no special support from the compiler, but your OS kernel would need to catch the fp_disabled traps, and emulate all of the FPU instructions. I believe e.g. RTEMS doesn't have a Sparc FPU software emulator, so that could be a problem for you, depending on what OS you're running. Handling the traps in software may also be somewhat slower than handling them via function calls emitted by the compiler.
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