[llvm-dev] Custom assembler subset

Ahmed Bougacha via llvm-dev llvm-dev at lists.llvm.org
Fri Jun 3 08:53:21 PDT 2016


-llvmdev at cs.uiuc.edu, that list isn't in use anymore.

On Wed, Jun 1, 2016 at 4:48 PM, Kenneth Adam Miller via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Hello all,
>
> I would like to restrain the compiler that I build on my local box from
> picking all but a particular set of opcodes. Is there a way to accomplish
> this in a straightforward way?

Can you elaborate a bit on what you're really trying to achieve?

One starting point could be to introduce new subtarget features, and
use them as predicates on the instructions you want (or, probably,
those you don't want).  See, e.g., http://reviews.llvm.org/D18802.

Another approach could be to use the (also complex) SelectionDAG
legalization machinery to convert the operations you don't want into
"legal" ones (that'd be in <target>ISelLowering.cpp, and
Legalize*.cpp).

> I'm pretty sure that there is a list of
> opcodes to semantics mappings.

There isn't, because nothing LLVM does needs it, and, more
importantly, because you can't express every ISA in LLVM IR (and vice
versa).

> In addition, is there a way to look at an associative mapping of LLVM IR to
> opcode, and/or vice versa?

There is a mapping of sorts, but, as you saw, it's convoluted:

- SelectionDAG (optimized instruction selection) has its own set of
opcodes. Some are generic and inspired by IR (ISDOpcodes.h), but some
are target-specific lower level constructs (<target>ISelLowering.h).
Instructions are sometimes associated with these opcodes
(ISDOpcodes.h; look for '[(' in the various <target>Instr*.td files)

- alternatively, FastISel (fast instruction selection) does a more
direct mapping from LLVM IR to machine instruction (look for BuildMI
calls in <target>FastISel.cpp files)


Shameless plug: I do have an out-of-tree project that tries to infer
such a mapping from the various .td files, if you do end up needing it.

-Ahmed

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