[llvm-dev] Lowering For Loops to use architecture "loop" instruction

[Roel Jordans via llvm-dev]

On 02/06/16 19:14, Joerg Sonnenberger via llvm-dev wrote:
> On Thu, Jun 02, 2016 at 03:18:08AM +0000, Dilan Manatunga via llvm-dev wrote:
>> I'm working on project which involves writing a backend for a hypothetical
>> architecture. I am currently trying to figure out the best way to translate
>> for loops to use a specialized "loop" instruction the architecture
>> supports. The instruction is similar X86's loop instruction, where a
>> register is automatically decremented and the condition is automatically
>> checked to see if loop execution should continue.
>>
>> I was wondering what is the best way to go about implementing this. I tried
>> looking to see how X86 implemented their loop instruction, but couldn't
>> really find where the IR instructions were being lowered to the loop
>> instruction.
>
> A better example might PowerPC's CTR loop pass.
>
> Joerg

Or Hexagon's hardware loops pass.

Roel

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