[llvm-dev] BPF backend with vector operations - error "Could not infer all types in, pattern!"

[Alex Susu via llvm-dev]

   Hello.
     I come back to this older thread.
     Again, because of i64immSExt32 I receive TableGen error "Could not infer all types 
in, pattern!" (exact details written below). So far I'm not able to generate selection 
code with TableGen for the ADD_r* instructions, etc:
            def i64immSExt32 : PatLeaf<(imm),
                 [{return isInt<32>(N->getSExtValue()); }]>;

     As in the case of https://groups.google.com/forum/#!topic/llvm-dev/LfltBGG9ru0 : "It 
seems that defining a new register class changes how the tblgen infers the types in the 
DAG patterns. So what is the right way to add a register class for a different type?"

     Please help.

   Thank you,
     Alex

On 1/9/2016 9:29 PM, RCU wrote:
>    Hello.
>      (WRONG: I solved this issue (from the previous email).)
>
>      Got inspired from http://comments.gmane.org/gmane.comp.compilers.llvm.devel/73619,
> (also https://groups.google.com/forum/#!topic/llvm-dev/LfltBGG9ru0),
> http://lists.llvm.org/pipermail/llvm-dev/2007-April/008843.html
>
>      What I did was to edit ConnexInstrInfo.td and replaced all occurrences:
>          PatLeaf<(imm)
>         %(which were ambiguous since the variable name ("in dag operator") does not have a
> type and this poses issues to the Type inference algorithm, since I added in
> ConnexRegisterInfo.td a second RegisterClass with type v2i64)
>      with
>          PatLeaf<(i64 imm)
>      namely:
>         - def i64immSExt32 : PatLeaf<(i64 imm),
>                  [{return isInt<32>(N->getSExtValue()); }]>;
>
>    Best regards,
>      Alex
>
> On 1/8/2016 1:31 AM, RCU wrote:
>>    Hello.
>>      I've tried to add some simple arithmetic vector operations to the BPF backend
>> available in the LLVM repo. Because I added in BPFRegisterInfo.td another RegisterClass
>> (taken from the Mips backend):
>>    def MSA128W: RegisterClass<"BPF", [v2i64, v2f64], 128,
>>                             (sequence "W%u", 0, 31)>;
>> in order to support vector for example, ADD operations, I get the following error when
>> building llc:
>>    JEQ_ri:         (BPFbrcc i64:i64:$dst, (imm:i64)<<P:Predicate_i64immSExt32>>:$imm,
>> (imm:{i64:v4i32})<<P:Predicate_BPF_CC_EQ>>, (bb:Other):$BrDst)
>> Included from ~/LLVM/llvm38Nov2016/llvm/lib/Target/BPF/BPF.td:14:
>> ~/LLVM/llvm38Nov2016/llvm/lib/Target/BPF/BPFInstrInfo.td:131:1: error: In JEQ_ri: Could
>> not infer all types in pattern!
>>    defm JEQ  : J<0x1, "jeq",  BPF_CC_EQ>;
>>
>>
>>    The error is a bit cryptic - basically it seems that we can have 2 different value
>> types (i64 and v4i32) for immediate operand imm. I guess this is because in
>> BPFRegisterInfo.td I define also another RegisterClass:
>>    def GPR : RegisterClass<"Connex", [i64], 64, (add (sequence "R%u", 0, 31))>;
>>
>>
>>    Can somebody tell me how can I get rid of this <<Could not infer all types in
>> pattern!>> error message? (I can provide more info, if required.)
>>
>>    Thank you,
>>      Alex