[llvm-dev] Lowering For Loops to use architecture "loop" instruction

[Tim Northover via llvm-dev]

On 2 June 2016 at 09:26, Dilan Manatunga <manatunga at gmail.com> wrote:
> I guess my area of confusion is how do I know that the br_cc instruction is
> for a loop and not just an if statement. I am still getting familiar with
> the backend process, so sorry for any dumb questions.

Do you need to know that? Does the CPU handle non-loop uses of this
instruction poorly, for example? Otherwise, it seems like as long as
the semantics match up you're good to go.

If you *do* need to know, I think I'd probably go for a
MachineFunction pass later on that can use MachineLoopInfo to decide
when to combine the instructions. I don't think ISelDAGs have access
to loop information (at least I've never seen it used).

The annoyance with that approach is that dealing with MachineInstrs is
messy. But it's certainly viable.

Cheers.

Tim.