[llvm-dev] Signed Division and InstCombine

[John Regehr via llvm-dev]

Just a reminder that Alive was created to answer exactly this kind of 
question.

https://github.com/nunoplopes/alive

John


regehr at hawking:~$ ./alive/alive.py sdiv.opt
----------------------------------------
Optimization: 1
Precondition: true
   %conv = sext i16 %in1 to i32
   %conv1 = sext i16 %in2 to i32
   %div = sdiv i32 %conv, %conv1
   %out = trunc i32 %div to i16
=>
   %out = sdiv i16 %in1, %in2


ERROR: Domain of definedness of Target is smaller than Source's for i16 %out

Example:
%in1 i16 = 0x8000 (32768, -32768)
%in2 i16 = 0xFFFF (65535, -1)
%conv i32 = 0xFFFF8000 (4294934528, -32768)
%conv1 i32 = 0xFFFFFFFF (4294967295, -1)
%div i32 = 0x00008000 (32768)
Source value: 0x8000 (32768, -32768)
Target value: undef


On 6/1/16 12:42 AM, Tim Northover via llvm-dev wrote:
> Hi Dilan,
>
> On 31 May 2016 at 15:34, Dilan Manatunga via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
>> What is the reason for the exclusion of sdiv from the operations considered
>> valid for execution in a truncated format.
>
> A 16-bit division of INT16_MIN by -1 is undefined behaviour but the
> original ext/trunc version is well-defined as 0.
>
> Cheers.
>
> Tim.
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