[llvm-dev] RFC: SIMD math-function library

[Tian, Xinmin via llvm-dev]

I don't have a strong preference using either parallel_lib or compiler-rt as the home for vectorlib, or a new one. Assume we go with parallel_libs, the structure is more or less like below, right?   

                   parallel_libs
                            |
  -------------------------------------------------------------
  |                                                 |                          |
vector                             streamexecutor     offload
  |
--------------------
 |         |           |
x86   arm   power 

Thanks,
Xinmin

-----Original Message-----
From: Hal Finkel [mailto:hfinkel at anl.gov] 
Sent: Wednesday, July 27, 2016 8:46 AM
To: Chandler Carruth <chandlerc at gmail.com>; llvm-dev at lists.llvm.org
Cc: Masten, Matt <matt.masten at intel.com>; Naoki Shibata <shibatch.sf.net at gmail.com>; Tian, Xinmin <xinmin.tian at intel.com>
Subject: Re: RFC: SIMD math-function library

Hi everyone,

I think that everyone is on the same page. We'll put together a patch for review.

One remaining question: There seem two potential homes for this library: parallel_libs and compiler-rt. Opinions on where the vectorized math functions should live? My inclination is to target it for the new parallel_libs project, in part because I feel like compiler-rt has too many things grouped together already, and in part because vectorization is a form of parallel execution. Thoughts?

Thanks again,
Hal

----- Original Message -----
> From: "Xinmin Tian" <xinmin.tian at intel.com>
> To: "Naoki Shibata" <shibatch.sf.net at gmail.com>, "Hal Finkel" 
> <hfinkel at anl.gov>
> Cc: llvm-dev at lists.llvm.org, "Chandler Carruth" <chandlerc at gmail.com>, 
> "Matt Masten" <matt.masten at intel.com>
> Sent: Thursday, July 14, 2016 11:55:24 PM
> Subject: RE: RFC: SIMD math-function library
> 
> Naoki,
> 
> Intel is planning open-source SVML library (most of them if it not 
> 100%), 6 functions of SVML are open sourced for GCC and LLVM already. 
> But,  Intel SVML is x86 centric (SSE2, SSSE3, SSE4.1, SSE4.2, AVX, 
> AVX2 ....}. Personally, I am not sure if it would be fairly easy to 
> port SVML to other architectures. SVML library team may provide a 
> better answer, I will double check with them.
> 
> Given that SLEEF supports many different architectures, I think it has 
> a value for LLVM, at least before all porting is done for SVML library 
> to other architectures by LLVM community after Intel open sourced it.
> 
> Thanks,
> Xinmin
> 
> -----Original Message-----
> From: Naoki Shibata [mailto:shibatch.sf.net at gmail.com]
> Sent: Thursday, July 14, 2016 9:38 PM
> To: Hal Finkel <hfinkel at anl.gov>
> Cc: llvm-dev at lists.llvm.org; Chandler Carruth <chandlerc at gmail.com>; 
> Tian, Xinmin <xinmin.tian at intel.com>; Masten, Matt 
> <matt.masten at intel.com>
> Subject: Re: RFC: SIMD math-function library
> 
> 
> Hi all,
> 
> Okay, the point is whether Intel will publish the source code for 
> their SVML. If Intel will make SVML open-source, there would be not 
> much advantage in incorporating SLEEF into LLVM, since it would be 
> also fairly easy to port SVML to other architectures. If Intel will 
> not open-source SVML, then there could be advantage in using SLEEF for 
> x86 by inlining the functions.
> 
> Is it possible to ask the person in charge what exactly Intel is going 
> to contribute?
> 
> Naoki Shibata
> 
> 
> On 2016/07/15 12:53, Hal Finkel wrote:
> > Hi again,
> >
> > As this RFC implies, I've been using the SLEEF library proposed here 
> > with Clang/LLVM for many years, and fully support its adoption into 
> > the LLVM project.
> >
> > I'm CC'ing Matt and Xinmin from Intel who have started working on 
> > contributing support for their SVML library to LLVM 
> > (http://reviews.llvm.org/D19544), and I understand plan to 
> > contribute (some subset of) the vector math functions themselves.
> > I'm also excited about Intel's planned contributions.
> >
> > Here's how I currently see the situation: Regardless of what Intel 
> > contributes, we need a solution in this space for many different 
> > architectures. From personal experience, SLEEF is relatively easy to 
> > port to different architectures (i.e. different vector ISAs), and 
> > has already been ported to several. The performance is good as is 
> > the accuracy. I think it would make a great foundation for a 
> > vector-math-function runtime library for the LLVM project. I don't 
> > know what routines Intel is planning to contribute, or for what 
> > architectures they're tuned, but I expect we'll want to use those 
> > implementations on x86 platforms where appropriate.
> >
> > Matt, Xinmin, what do you think?
> >
> > Thanks again,
> > Hal
> 
> 

--
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory