[llvm-dev] Question about store with unaligned memory address

[JinGu Kang via llvm-dev]

Hi All,

I have a question about store with unaligned memory address.

I am working on target which has only 4 byte aligned load and store 
instruction and I am generating 2 load and store instructions to store 
value on memory which the address is not aligned 4. I am doing it with 
lowering store as follow:

1. make low and high address with alignment.
2. load 2 words from low and high address.
3. manipulate them with values to store according to alignment.
4. store 2 words modified to low and high address

There could be independent stores with same target memory address 
because it makes and accesses low and high address with lowering. In 
order to keep the order between loads and stores, I have used chain and 
glue on the DAG but some passes have mixed it in machine instruction 
level. I am feeling above idea is not good... Do I need to use pseudo 
instruction? I am not sure which one is good idea... Could someone have 
experience with unaligned memory access? If I missed something, please 
let me know. It will be really helpful!!!

Thanks,
JinGu Kang