[llvm-dev] Using `smullohi` in TableGen patterns

[Dylan McKay via llvm-dev]

> As far as I know, you cannot define a tablegen pattern with multiple
results, and need to use C++ matching. I’m kind of surprised there are
defined td nodes for these.

Yes they were added a while ago, but never used.

If I write a C++ matcher, will the register allocator work correctly? The
multiplication instruction I'm working with always writes the result to
registers `R1` and `R0`, but if that logic is in C++, how will the
regallocator know?

On Mon, Jan 18, 2016 at 11:34 PM, Matt Arsenault <arsenm2 at gmail.com> wrote:

>
> On Jan 17, 2016, at 22:41, Dylan McKay via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
> I’m hitting TableGen errors trying to match the smullohi <lhs> <rhs> node
> in TableGen.
>
> smullohi returns two results, which is the problem. I am not sure how to
> match against multiple results. The only other nodes to return two operands
> are umullohi, udivrem, and sdivrem. There are no examples of these in
> TableGen in tree.
>
> The closest I can get is this:
>
>         set (R1, R0, (umullohi GPR8:$lhs, GPR8:$rhs))
>
>
> As far as I know, you cannot define a tablegen pattern with multiple
> results, and need to use C++ matching. I’m kind of surprised there are
> defined td nodes for these.
>
> -Matt
>
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