[llvm-dev] [LLD] Question of handling a special relocation in COFF

Rui Ueyama via llvm-dev llvm-dev at lists.llvm.org
Thu Jan 14 12:52:06 PST 2016


I don't know if this would answer to your question, but the file you want
to take a look (if you haven't) is
https://github.com/llvm-mirror/lld/blob/master/COFF/Chunks.cpp. All
reocations are implemented in this file.

It sounded like you want to add something like add32(Off, S + ... +
Config->ImageBase) for your relocation. There are a lot of examples in the
file.

You are trying to define a new type of relocation, right? Or, you are
trying to post this to a new architecture?

On Thu, Jan 14, 2016 at 12:08 PM, Yi-Hong Lyu via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hello all,
>
> I am handling a special architecture's relocation in COFF. Such relocation
> (IMAGE_REL_RELSEC) is used specifically in static linked executables:
>
> $ llvm-objdump -d -r foo1.obj:
>
> Disassembly of section .text:
>
> 00:  mov 04, r2
>             00000002:  IMAGE_REL_RELSEC   .text
> 04: ...
>
> $ llvm-objdump -d -r foo2.obj:
>
> Disassembly of section .text:
>
> 00:  mov 04, r2
>             00000002:  IMAGE_REL_RELSEC   .text
> 04: ...
>
> And the expected output will be:
> $ lld-link /out:foo.exe foo1.obj foo2.obj
>
> $ llvm-objdump -d foo.exe:
>
> 40000000: mov 40000004, r2
> 40000004: ...
> 40000008: mov 4000000c, r2
> 4000000c: ...
>
> PS. 40000004 = Addend (4) + Image Base (40000000) + Instruction RVA (0)
>        4000000c = Addend (4) + Image Base (40000000) + Instruction RVA (8)
>
> In Summary, such relocation stores addend that relative to .text section.
> Linker is expected to fix the relocation of the instruction by image base
> and the instruction RVA. I am wondering whether there is other relocation
> like IMAGE_REL_RELSEC therefore I can take a look of it.
>
> Thanks for you reply
>
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>
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