[llvm-dev] Prevent DAGCombine from slicing a vector load from non-default address space

[Matt Arsenault via llvm-dev]

> On Jan 12, 2016, at 09:32, Johnson, Nicholas Paul via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> 
> Is there a clean way to prevent this transformation?  I don't see any way to fix this other than adding a new address-space-sensitive method to the TargetLowering interface which targets may override.
> 

Unfortunately there currently is no way to specify legality of a load per address space, although I really could use this ability. A special new TLI hook is the simplest option here.

-Matt