[llvm-dev] Question about relaxation in MC assembler

Jim Grosbach via llvm-dev llvm-dev at lists.llvm.org
Mon Jan 11 11:11:49 PST 2016


The MC relaxation is for choosing between different forms of a single instruction. You want something like the ARM64 branch relaxation pass instead.

-Jim

> On Jan 11, 2016, at 6:42 AM, JinGu Kang via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi All,
> 
> I have a question about relaxation stuff in MC assembler.
> 
> I am encoding conditional branch instructions with PC relative address in assembler. I have met some tests with relative offsets over the instruction's address field. I think I need to change the conditional instruction to multiple instructions with basic blocks for else and then syntax and it should be done in assembler because I can know correct the relative address in assembler level. I am looking at relaxation stuff in assembler to do it but I think it intends to change a instruction to one the other instruction. Could someone let me know how to change a instruction to multiple instructions in assembler level please? If I missed something, please let me know.
> 
> Thanks,
> JinGu Kang
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