[llvm-dev] Pattern doesn't match error

[Krzysztof Parzyszek via llvm-dev]

On 1/6/2016 12:52 PM, Rail Shafigulin wrote:
>
> I'm not sure I understand it. Here is the change that I made for my target
>
> class InstEscala<dag outs, dag ins, string asmstr, list<dag> pattern>
>    : Instruction {
> ....
> ....
>    let mayLoad = 0;
> ....
> ....
>   }
>
> All I have done is set mayLoad to 0. Would you mind using your
> explanation in the context of my change? I think once there is a
> specific case it is easier to understand what is the problem.

If the pattern that you use to define a particular instruction of this 
class contains an SDNode that has a "may load" property, it will infer 
that the pattern has a "mayLoad" property.  That property must be the 
same as the "mayLoad" that is explicitly specified in the instruction 
definition.

Look in utils/TableGen/CodeGenDAGPatterns.cpp:

void AnalyzeNode(const TreePatternNode *N) {
   [...]
     // Notice properties of the node.
     if (N->NodeHasProperty(SDNPMayStore, CDP)) mayStore = true;
     if (N->NodeHasProperty(SDNPMayLoad, CDP)) mayLoad = true;
     if (N->NodeHasProperty(SDNPSideEffect, CDP)) hasSideEffects = true;
     if (N->NodeHasProperty(SDNPVariadic, CDP)) isVariadic = true;
   [...]
}

If your pattern contains a "load", this will directly conflict with the 
explicit "mayLoad = 0".

-Krzysztof

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