[llvm-dev] Writing an LLVM Pass that depends on mem2reg
Mehdi Amini via llvm-dev
llvm-dev at lists.llvm.org
Thu Feb 11 11:44:23 PST 2016
Hi,
> On Feb 11, 2016, at 10:40 AM, via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi,
> I read your post in LLVM forum. I want to use getAnalysisUsage(AnalysisUsage &AU) to get MachineLoopInfo. I have used this on my passes before but, this time I am trying to get this information in ScheduleDAGRRList scheduler class. There is no runonmachinefunction function. Do you know how I can implement this?
Short answer: you can't, unless I am missing something really obvious.
I'm not sure it even makes sense since this is invoke *during instruction selection*. It means that all the machine basic blocks haven't been created yet. SelectionDAG operates on a single basic block only.
You should step back and think about what you're really trying to achieve here.
If you provide more information on what you're trying to do and why you need this, we may be able to better help to find a solution.
--
Mehdi
> Regards,
> Fateme
> I will appreciate it you can help me with this problem.
> <quote author='Mehdi Amini via llvm-dev'>
> Hello,
>
> I am used to specifying dependence on other LLVM passes in the
> `getAnalysisUsage(AnalysisUsage &)` method of my pass. However, it doesn't
> seem that there is a header file that exposes the `mem2reg` pass - it is
> implemented in `Mem2Reg.cpp` as a wrapper.
>
> Is there an easy way to reuse this pass, or should I, in essence, duplicate
> `Mem2Reg.cpp` in my project?
>
> Cheers,
> - Stan
>
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> Quoted from:
> http://llvm.1065342.n5.nabble.com/llvm-dev-Writing-an-LLVM-Pass-that-depends-on-mem2reg-tp91085.html
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