[llvm-dev] Assigning constant value without alloca/load/store
Paul Peet via llvm-dev
llvm-dev at lists.llvm.org
Sun Feb 7 15:00:43 PST 2016
Hello,
I am currently trying to translate some custom IR to LLVM-IR and came
across and issue.
The custom IR has several registers and I am basically try to SSAfy it so
it can be easily translated/converted to LLVM-IR.
The problem:
Since in my custom IR I can reassign every register I have to reassign
every new expression with a new llvm Value. But my IR has something like
this:
REG A = VAR C + CONST 2
REG A = CONST 12
So my workaround looks like:
; I am returning the registers in an anonymous struct
define { i32, i32, i32 } @test(i32 %var_c) {
; Initializing registers
%reg_a_0 = select i1 true, i32 0, i32 0
%reg_b_0 = select i1 true, i32 0, i32 0
%reg_c_0 = select i1 true, i32 0, i32 0
; Translated instructions
%reg_a_1 = add i32 %var_c, 2
%reg_a_2 = select i1 true, i32 12, i32 0
; Prepare return values
%ret_0 = insertvalue { i32, i32, i32 } undef, i32 %reg_a_2, 0
%ret_1 = insertvalue { i32, i32, i32 } %ret_0, i32 %reg_b_0, 1
%ret_2 = insertvalue { i32, i32, i32 } %ret_1, i32 %reg_c_0, 2
ret { i32, i32, i32 } %ret_2
}
I am basically using "select i1 true, i32 1, i32 0" so after optimization
it gets:
%val = i32 1
But as I said this looks like a hack to me and I can't simply use "%val =
i32 1".
So what's the proper way to do this without actually using
alloca/load/store.
Regards,
Paul
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