[llvm-dev] New register class and patterns

[Matt Arsenault via llvm-dev]

On 02/03/2016 06:17 PM, Rail Shafigulin via llvm-dev wrote:
> I think I'm slowly getting it. To answer your question, no I did not 
> set isAllocaable = 0 for the new register class. But I'm still 
> confused. Original instruction does not have an output register. It 
> sets a flag in the special purpose register. So why creating a new 
> register class would cause a problem? In other words, since there is 
> no output register, why would LLVM start complaining. Below I'm 
> repeating some code for reference. Any help is appreciated.
It does have an output register, it's just an implicit flag register. It 
still has a DAG output. I'm not sure if the allocatable bit matters at 
this point for selection purposes, but it does later. Not adding a type 
to the register class can also be problematic (e.g. a flag register 
should have i1 added to regTypes for its class).

-Matt