[llvm-dev] [Hexagon] Failure to disassemble some new-value instructions

[Ralf-Philipp Weinmann via llvm-dev]

Dear list,

I noticed that the Hexagon disassembler has issues with disassembling some firmwares I have. When tracing one of these problems, the handling of some new-value instructions in HexagonDisassembler::getSingleInstruction() turned out to be the cause, specifically this statement:

[lines 384-386 in HexagonDisassembler.cpp in HEAD]
     else if (SubregBit)
       // Subreg bit should not be set for non-doublevector newvalue producers
       return MCDisassembler::Fail;

Where does the requirement come from? Maybe I overlooked it, but I do not see it in the Hexagon V5/V55 Programmer’s Reference Manual.

One instruction packet I have encountered in the wild that triggers this failure is:

10:       e0 7e df 78 78df7ee0 {  r0 = #-9 
14:       01 40 91 91 91914001    r1 = memw(r17 + #0)
18:       10 e1 03 25 2503e110    if (cmp.gtu(r1.new, #1)) jump:t 0x30 }

Removing the requirement seems to work fine (see attached patch).

Cheers,
Ralf

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