[llvm-dev] TableGen - Help to implement a form of gather/scatter operations for Mips MSA

[Daniel Sanders via llvm-dev]

Hi Alex,

> On 9 Dec 2016, at 01:52, Alex Susu via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> 
>  Hello.
>    I read on page 4 of https://urldefense.proofpoint.com/v2/url?u=http-3A__www.cs.fsu.edu_-7Ewhalley_cda5155_chap4.pdf&d=CwIGaQ&c=Hw-EJUFt2_D9PK5csBJ29kRV40HqSDXWTLPyZ6W8u84&r=OWKUiguzzd2_T_K4Ka0qDEQ1sz6uNXO3VsbQDbiA6R8&m=qBOLs4N_Wqx6PzrOly6PAZyiapHyxBMIhn3E9OkjYjc&s=oukhOwlS56XWO6LLHzfUbAUVUvWNyAQ4nEcCxOOqeCs&e=  that gather and scatter operations exist for Mips, named LVI and SVI, respectively.

The title of slide 4 is 'Extending the MIPS to Support Vector Operations' and slide 6 mentions VMIPS so I think you may be looking at a VMIPS specific extension of the MIPS ISA. VMIPS appears to be an implementation of the R3000 that's intended as a teaching tool. Does your MIPS CPU have this extension?

>    Did anyone think of implementing in the LLVM Mips back end (part of the MSA vector instructions) gather and scatter operations?

Simon Dardis would be able to confirm but there aren't any as far as I know. The closest I can think of is in MSA where you can get a similar effect with a sequence of ld.df's and vshf.df's (or pck*.df's, ilv*.df's, etc. for some of the common cases).

>    If so, can you share with me the TableGen spec? (I tried to start from LD_DESC_BASE, but it doesn't seem to be trivial. Also, LLVM seems to have implemented scatter/gather instructions only for the x86 processor - there, they defined new SDNodes called GatherNode and ScatterNode.)
> 
>  Thank you,
>    Alex
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