[llvm-dev] Immediate operand for vector instructions

[Alex Susu via llvm-dev]

   Hello.
     Tim, thank you for the observations. This is the one thing that I haven't tried in 
the previous email :) . So the complete correct specification is:
       class REPEAT_DESC_BASE<InstrItinClass itin = NoItinerary> {
         dag OutOperandList = (outs);
         dag InOperandList = (ins i64imm:$imm);
         string AsmString = "REPEAT_X_TIMES($imm );";
         list<dag> Pattern = [(int_connex_repeat_x_times imm:$imm)];
         bit hasSideEffects = 1;
         InstrItinClass Itinerary = itin;
       }

     Although not relevant I guess, these were the error messages I got when using 
different types:
         - <<Unknown leaf kind: i64imm:i64:$imm>>
           when using:
             list<dag> Pattern = [(int_connex_repeat_x_times i64imm:$imm)];
         - <<error:Unknown operand class 'imm' in 'REPEAT_D' instruction!>>
           when using:
             dag InOperandList = (ins i64imm:$imm);


   Best regards,
     Alex

On 12/6/2016 4:27 AM, Tim Northover wrote:
> Hi Alex,
>
> On 5 December 2016 at 18:00, Alex Susu <alex.e.susu at gmail.com> wrote:
>>    We can compile it. Note that this is the only compilable code w.r.t.
>> using i64 or i64imm (in the 2 lines above: "dag InOperandList", "list<dag>
>> Pattern").
>
> Yeah, you actually want to use "imm":
>
>     list<dag> Pattern = [(int_repeat_x_times imm:$imm)];
>
> When the table generator sees "i64" it doesn't go looking in the
> InOperandList to determine that the operand should be an immediate. It
> just matches anything and shoves it into a register. It *does* know
> about "imm" though because that's defined to match up to an
> ISD::Constant SDNode.
>
> Cheers.
>
> Tim.
>