[llvm-dev] Weird code in MipsGenSubtargetInfo.inc
Simon Atanasyan via llvm-dev
llvm-dev at lists.llvm.org
Fri Dec 9 22:56:42 PST 2016
Hi,
On Fri, Dec 9, 2016 at 11:10 PM, Eugene Zelenko via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Clang-tidy modernize-use-bool-literals pointed to some weird code in:
> MipsGenSubtargetInfo::resolveSchedClass(). For example:
>
> case 3: // II_ADD
> if (SchedModel->getProcessorID() == 2) { // MipsP5600Model
> if ((1))
> return 779; // P5600WriteALU
> if ((0))
> return 780; // P5600WriteAL2
> }
> break;
>
> I think will be good idea if somebody who knows MIPS and table
> generation specific will look onto this issue.
This code corresponds "FIXME: Implement selection predicate" comments
in the MipsScheduleP5600.td. The code was added in the r248725.
--
Simon Atanasyan
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