[llvm-dev] BSWAP matching in codegen

[Friedman, Eli via llvm-dev]

On 12/9/2016 11:03 AM, Jim Lewis via llvm-dev wrote:
>
> Thanks, that helps enormously! The issue is that the match is supposed 
> to support both cascade and tree OR patterns, but there appears to be 
> a problem with the tree matching. Both test1 and test6 in the ARM 
> tests exercise the cascade pattern, and I remember now our fix is 
> confined to the tree case.
>
> I hesitate to claim now that there’s no coverage for the tree pattern, 
> but it is failing to match the patterns we use in our tests, one of 
> which looks like this:
>
> define i32 @test_tree(i32 %x) {
>
> %byte0 = and i32 %x, 255        ; 0x000000ff
>
>   %byte1 = and i32 %x, 65280      ; 0x0000ff00
>
>   %byte2 = and i32 %x, 16711680   ; 0x00ff0000
>
>   %byte3 = and i32 %x, 4278190080 ; 0xff000000
>
>   %tmp0 = shl i32 %byte0, 8
>
>   %tmp1 = lshr i32 %byte1, 8
>
>   %tmp2 = shl i32 %byte2, 8
>
>   %tmp3 = lshr i32 %byte3, 8
>
>   %or0 = or i32 %tmp0, %tmp1
>
>   %or1 = or i32 %tmp2, %tmp3
>
>   %result = or i32 %or0, %or1
>
>   ret i32 %result
>
> }
>
> I’m still investigating exactly how it’s failing on this one; let me 
> know if I’m missing something else here.
>
>

Oh, I see... yes, the existing tree matching logic is complete 
nonsense.  It somehow manages to completely ignore N1, which is where 
half the value is supposed to come from.

-Eli

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

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