[llvm-dev] Is the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 legal?

[Lin, Jin via llvm-dev]

Hi,
The phase of instruction combine cannot handle the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 generated by the phase of CFG simplification and the compiler generates an assertion failure.
I wonder whether this is valid LLVM IR:

%4 = select i1 %tobool.i, metadata !12, metadata !10


Before CFGSimplify
cond.true.i:                                      ; preds = %entry
  %add.ptr.i = getelementptr inbounds i8, i8* %2, i64 8
  %left_.i.i = bitcast i8* %add.ptr.i to i32**
  %3 = call i32** @llvm.fakeload.p0p0i32(i32** %left_.i.i, metadata !8) #6  br label %_ZN1G7insert_Ev.exit

cond.false.i:                                     ; preds = %entry
  %right_.i.i = getelementptr inbounds i8, i8* %2, i64 16
  %4 = bitcast i8* %right_.i.i to i32**
  %5 = call i32** @llvm.fakeload.p0p0i32(i32** %4, metadata !11) #6
  br label %_ZN1G7insert_Ev.exit

After CFGSimplify

  %4 = select i1 %tobool.i, metadata !12, metadata !10
  %add.ptr.i = getelementptr inbounds i8, i8* %2, i64 %3
  %left_.i.i = bitcast i8* %add.ptr.i to i32**
  %5 = call i32** @llvm.fakeload.p0p0i32(i32** %left_.i.i, metadata %4) #6
  %6 = load i32*, i32** %5, align 8, !tbaa !8

Thanks,

Jin
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