[llvm-dev] Open Project : Inter-procedural Register Allocation [GSoC 2016]

[Mehdi Amini via llvm-dev]

Hi,

Here is the patch (I already sent it in this thread):

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Note that Vivek submitted a proposal to implement this as a GSOC project, we'll know soon if he gets selected.

-- 
Mehdi


> On Apr 10, 2016, at 8:10 AM, Adam Husar <husar at codasip.com> wrote:
> 
> Hello Mehdi,
> 
>  could I ask you if you could share your patch?
> We are testing whether at least some leaf call register allocation optimization could help and you patch or some pointers on what to do will be very useful.
> 
> Thank you
>  Adam
> 
> 
> On Wed, 23 Mar 2016 05:04:41 +0100, Mehdi Amini via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
>> 
>>> On Mar 22, 2016, at 6:04 PM, Matthias Braun via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>>> 
>>> No need to apologize this thread surely deserved some answers :)
>>> 
>>> From my perspective this project sounds doable. I would expect the register allocation parts to be not too hard: I imagine this being just distilling a new clobber regmask after allocating a function. I would expect the challenging (or annoying) part to get a machine module pass (or a similar mechanism to influence the order in which functions are processed) and a callgraph in the backend.
>> 
>> I have a very tiny patch that wrap the backend in a CGSCC pass manager, which will achieve what is needed here I believe: i.e. running CodeGen for every callee before any caller.
>> I can rebase it if anyone is interested.