[llvm-dev] infer correct types from the pattern

Rail Shafigulin via llvm-dev llvm-dev at lists.llvm.org
Mon Apr 4 15:58:06 PDT 2016


>
> def VGETITEM:
>   [(set GPR:$rD, (extractelt (v4i32 VR:$rA), GPR:$rB))]
>
> def: Pat<(extractelt (v4f32 VR:$rA), GPR:$rB)),
>          (VGETITEM VR:$rA, GPR:$rB)>;
>
> -Krzysztof
>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>

What about load instruction? I tried the same approach but I got an error.

error: In anonymous_570: Type inference contradiction found, merging
'{v4i32:v4f32}' into '{i32:f32}'

For some reason I had no issues doing the same for store.

Any help is really appreciated.

Here is what I tried for load:

// Addressing modes.
def ADDRri : ComplexPattern<i32, 2, "SelectAddr", [frameindex], []>;

// Address operands
def MEMri : Operand<i32> {
  let PrintMethod = "printMemOperand";
  let EncoderMethod = "getMemoryOpValue";
  let DecoderMethod = "DecodeMemoryValue";
  let MIOperandInfo = (ops GPR, i32imm);
}

class LOAD<bits<4> subop, string asmstring, list<dag> pattern>
  : InstLD<subop, (outs GPR:$rD), (ins MEMri:$src),
           !strconcat(asmstring, "\t$rD, $src"), pattern> {
  bits<5> rD;
  bits<21> src;

  let Inst{25-21} = rD;
  let Inst{20-0} = src;
}

class LOADi32<bits<4> subop, string asmstring, PatFrag opNode>
  : LOAD<subop, asmstring, [(set (i32 GPR:$rD), (opNode ADDRri:$src))]>;

let mayLoad = 1 in {
  let Itinerary = l_lwz in
    def LWZ : LOADi32<0x1, "l.lwz", load>;
}

class VLOADi32<bits<4> subop, string asmstring, PatFrag opNode>
  : VLOAD<subop, asmstring, [(set (v4i32 VR:$rD), (opNode ADDRri:$src))]>;

let mayLoad = 1 in {
  let Itinerary = v_lwz in
    def VLWZ : VLOADi32<0x2, "v.lwz", load>;
}

// Cast load of a floating point vector to use the same
// operation as a load of an integer vector.
def: Pat<(set (v4f32 VR:$rD), (load ADDRri:$src)),
         (VLWZ VR:$rD, ADDRri:$src)>;



-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160404/b5a91125/attachment.html>


More information about the llvm-dev mailing list