[llvm-dev] TwoAddressInstructionPass::isProfitableToConv3Addr()

Hal Finkel via llvm-dev llvm-dev at lists.llvm.org
Tue Sep 29 12:31:24 PDT 2015


----- Original Message -----
> From: "Jonas Paulsson via llvm-dev" <llvm-dev at lists.llvm.org>
> To: "llvm-dev" <llvm-dev at lists.llvm.org>
> Sent: Tuesday, September 29, 2015 4:00:51 AM
> Subject: [llvm-dev] TwoAddressInstructionPass::isProfitableToConv3Addr()
> 
> Hi,
> 
> I have cases of instruction pairs, where one is cheaper 2-address,
> and
> the other 3-address. I would like to select the 2-addr instruction
> during isel, but use the 3-addr instruction to avoid a copy if
> possible.
> I find that TwoAddressInstructionPass::isProfitableToConv3Addr() is
> only
> checking
> for the case of a physreg copy, and so leaves the majority of cases
> as
> they are (2-address).
> 
> I would like to say "If 3-addr version would avoid a copy, use it!".
> Does anyone else have a similar situation?

I'm not sure how similar this is, but we have lib/Target/PowerPC/PPCVSXFMAMutate.cpp which changes the form of FMA instructions with tied operands in order to avoid copies. It might be sufficiently-similar to what you need to be useful.

 -Hal

> 
> To do this, one would need to check the kill-flag on the tied use
> operand. If it is not killed, one can assume that the use and dst
> registers overlap, and therefore the copy is needed for the
> two-address
> form. The kill flags would however need to be recomputed by TwoAddr
> pass, since
> LiveVariables clear them.
> 
> An alternative approach might be to have something like
> TII->handleMachineFunctionPostCoalescer() at the end of
> RegisterCoalescer.cpp::runOnMachineFunction(). There, one could look
> for
> instructions and query live intervals for overlap. This hook might
> also
> be useful for other things, since this is the point just before
> mi-sched/regalloc, where one could do things like estimate register
> pressure.
> 
> Any comments on this anyone?
> 
> /Jonas Paulsson
> 
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-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory


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