[llvm-dev] VLIW support

[Rail Shafigulin via llvm-dev]

Kun,

Thanks for the reply. I looked at it, but wasn't able to find where actual
instruction bundling takes place, i.e. where exactly in the code they pack
instruction into a single bundle. Do you know where it is done? I would
really appreciate any pointers.

Thanks.


On Fri, Sep 25, 2015 at 4:37 PM, Kun Ling <kunling at lingcc.com> wrote:

> Hi Rail,
>     For the VLIW support,  Qualcomm's Hexagon target is a good reference.
>
>      http://llvm.org/devmtg/2013-11/slides/Guerra-VLIW.pdf
>
>
> Kun Ling
>



>
> ------------------ Original ------------------
> *From: * "Rail Shafigulin via llvm-dev"<llvm-dev at lists.llvm.org>;
> *Date: * Fri, Sep 25, 2015 03:33 PM
> *To: * "llvm-dev"<llvm-dev at lists.llvm.org>;
> *Subject: * [llvm-dev] VLIW support
>
> Is there a VLIW support in LLVM? I found this,
> https://groups.google.com/forum/#!searchin/llvm-dev/VLIW, but it looks
> like it is not completely implemented. Specifically I'm interested in how
> instructions are bundled together. I can't seem to find it anywhere in the
> source code.
>
> Any help in resolving he issue is appreciated.
>
>


-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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