[llvm-dev] TableGen MCInstrDesc Instruction Size Zero

[Pete Cooper via llvm-dev]

Hi Sky

I think you need a ‘let Size = ‘ line in your instruction definition.

If you have fixed size instructions, then you can put a single size in the base class for all your instructions, eg, like this from AArch64InstrFormats.td

// Real instructions (have encoding information)
class EncodedI<string cstr, list<dag> pattern> : AArch64Inst<NormalFrm, cstr> {
  let Pattern = pattern;
  let Size = 4;
}

Or if you have variable sized instructions then you might need to set the size on each class of instruction you define, or even each instruction.

Cheers,
Pete
> On Sep 14, 2015, at 6:44 AM, Sky Flyer via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Dear all,
> 
> I am trying to write an AsmParser and a CodeEmitter for simple ADD instruction.
> Here is what I have in the TestGenInstrInfo.td:
> 
> extern const MCInstrDesc TestInsts[] = {
> ...
> { 23, 3, 1, 0, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo13, 0, nullptr },  // Inst #23 = ADD8_rr
> ...
> }
> 
> I parse the instruction successfully but I am not sure what I did wrong that the Size (as you can see in the line above is Zero for this instruction. (In EncodeInstruction, Desc.getSize() returns zero.)
> 
> Any help is appreciated....
> 
> Cheers,
> ES
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