[llvm-dev] Dynamic detection of signed integer overflow
Johannes Doerfert via llvm-dev
llvm-dev at lists.llvm.org
Sun Sep 13 04:41:37 PDT 2015
Hello Moritz,
What kind of dynamic detection are you planning to do? Do you want to
check each computation or build some kind of conditions statically that
imply overflows? In the latter case this might be interesting for you:
There is currently a patch pending [1] that will allow Polly [2] to
statically determine conditions under which a signed overflow will (not)
happen. However, by default it will only check expressions that
influence control or memory access functions in regions that are
analyzed by Polly.
We also used Polly to model OpenCL kernels recently and could provide
you with patches that allow (a lot but not all) kernels to be described
to a certain degree (the rest is overapproximated).
If any of this sounds interesting, you can also contact me directly.
Cheers,
Johannes
[1] http://reviews.llvm.org/D11977
[2] http://polly.llvm.org/
P.S.
I added some colleges to the CC that participated in the projects
described above.
On 09/13, Pflanzer, Moritz via llvm-dev wrote:
> Hello,
>
> I thought about doing a dynamic detection of signed integer overflow for OpenCL kernels based on the generated LLVM IR.
>
> A problem seems to be that the LLVM IR does not differentiate between signed and unsigned types in general. But for instance for additions it should be possible to use the "nsw" flag as indicator that the operations involves signed types. Is this a legal assumption so far?
> The next problem I discovered is that the "nsw" flag is not generated for additions involving vector types (http://lists.llvm.org/pipermail/cfe-dev/2011-May/014908.html).
>
> Is there any other method how I could get information only from the LLVM IR about whether signed types are involved in arithmetic operations? Or do you know any other project with the same or a similar goal of dynamic detection of signed integer overflow (for OpenCL)?
>
> Regards,
>
> Moritz
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--
Johannes Doerfert
Researcher / PhD Student
Compiler Design Lab (Prof. Hack)
Saarland University, Computer Science
Building E1.3, Room 4.31
Tel. +49 (0)681 302-57521 : doerfert at cs.uni-saarland.de
Fax. +49 (0)681 302-3065 : http://www.cdl.uni-saarland.de/people/doerfert
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