[llvm-dev] need help for customized backend LowerFormalArguments

Tim Northover via llvm-dev llvm-dev at lists.llvm.org
Wed Nov 25 14:27:59 PST 2015


On 25 November 2015 at 14:06, Xiangyang Guo via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>       const unsigned VReg = RegInfo.createVirtualRegister(&FOO::PRegsRegClass);
>       RegInfo.addLiveIn(VA.getLocReg(), VReg);
>       SDValue ArgIn = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);

Using MachineFunction::addLiveIn would probably be simpler, but I
*think* this ought to be OK too.

> However, when I use llc and print-after-all to check the machine
> instructions. At very beginning, the machine instructions look like this:
>
>     %vreg1<def> = COPY %P1; PRegs:%vreg1
>     %vreg0<def> = COPY %P0; PRegs:%vreg0
>     %vreg3<def> = COPY %vreg0; GRRegsAdditional:%vreg3 PRegs:%vreg0
>     %vreg4<def> = COPY %vreg1; GRRegsAdditional:%vreg4 PRegs:%vreg1
>     %vreg2<def> = ADDINT %vreg3, %vreg4; GRRegsAdditional:%vreg2,%vreg3,%vreg4
>     %R10<def> = COPY %vreg2; GRRegsAdditional:%vreg2 RET %R10

This looks fine to me.

> And after "Post-RA pseudo instruction expansion pass", it looks like this

I don't suppose your copyPhysReg implementation does something
degenerate for these? That's the callback that'll be used to actually
implement any COPY pseudo-instructions that need to be materialised,
not any TableGen related patterns you might have (as a general
guideline, if you're writing a pattern for a MOV instruction, you're
probably doing something wrong).

It's a good idea for copyPhysReg to assert for anything it can't
handle corrrectly.

If it's not that, the entire output of "llc -debug" would be useful.
Obviously a lot goes on between the two dumps you pasted here. Maybe
some other pass is doing something slightly wrong.

Cheers.

Tim.


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