[llvm-dev] Hexagon and choosing of slots

[Rail Shafigulin via llvm-dev]

> On Hexagon, the slot assignment is determined by the layout of the
> instructions in memory.  The order of the instructions in the packet does
> not matter either in the IR, nor in the .s file, but it does when the
> packet is encoded into the actual machine code.  In LLVM, the Hexagon
> shuffler orders the instructions just prior to encoding.
>
> Specifically, the instructions in the packet are encoded "in reverse",
> i.e. the instruction that will go to the highest slot will be encoded
> first, then the instruction that will go to the second highest slot, etc.
> In case of a packet with 4 instructions, it will be
>   addr:    slot3
>   addr+4:  slot2
>   addr+8:  slot1
>   addr+12: slot0
> Not all slots have to be occupied. If they are not, the hardware will
> assign the slots based on the instruction, but within a packet the slots
> must be in a decreasing order.  For example:
>   addr:    slot2
>   addr+4:  slot0
> is ok, but
>   addr:    slot1
>   addr+4:  slot0
> is not.
>
> There are also bits in each encoding word that indicate the end of the
> packet: those must also be set properly by the compiler.
>
> -Krzysztof
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>

Would you mind pointing me to the source code where actual shuffling
occurs. I looked through lib/Target/Hexagon but was not able to find it. Is
shuffling now part of a core code?

Thanks,

-- 
R
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151124/879853cf/attachment.html>