[llvm-dev] DFAPacketzer, Hexagon and bundles with 1 instruction

[Krzysztof Parzyszek via llvm-dev]

On 11/17/2015 4:23 PM, Rail Shafigulin wrote:
>
> I'm a little confused. If a bundle is supposed to have at least 2
> instructions, what is the point of
> VLIWPacketzierList::isSoloInstruction(...)? Say we have an instruction
> that can't be bundled with anything, how would one form a packet from it?

In the machine IR, a bundle is a regular instruction, which happens to 
have other instructions inside of it.  A basic block can have bundles 
mixed with non-bundled instructions.  If you iterate over a basic block 
using MachineBasicBlock::iterator, you will not see the contents of 
bundles, just the BUNDLE opcode.  For stepping into bundles you would 
need MachineBasicBlock::instr_iterator.

When it comes to the encoding of instructions for the hardware, the 
target-specific object-emission code must handle that properly.  That 
happens later, on a yet another program representation, where 
instructions are of type MCInst, not MachineInstr.

-Krzysztof

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