[llvm-dev] DFAPacketzer, Hexagon and bundles with 1 instruction

Rail Shafigulin via llvm-dev llvm-dev at lists.llvm.org
Tue Nov 17 13:30:50 PST 2015

I'm trying to figure out how Hexagon (I'm using it as an example for my own
VLIW) is handling bundles with 1 instruction, but I don't quite get it.
Here is the code that I have for a endPacket

// endPacket - End the current packet, bundle packet instructions and reset
// DFA state.
void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB,
                                         MachineInstr *MI) {
  if (CurrentPacketMIs.size() > 1) {
    MachineInstr *MIFirst = CurrentPacketMIs.front();
    finalizeBundle(*MBB, MIFirst, MI);

Based on this, it looks like packets with one instruction are not finalized
(finalizeBundle is the one which inserts a BUNDLE instruction). So what
happens with packets that have only 1 instruction? Is there a separate pass
that creates a bundle from a single instruction?

Any help is appreciated.

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