[llvm-dev] DFAPacketizer, Scheduling and LoadLatency

[Rail Shafigulin via llvm-dev]

> In particular, the LoadLatency is used in defaultDefLatency:
>
> /// Return the default expected latency for a def based on it's opcode.
> unsigned TargetInstrInfo::defaultDefLatency(
>      const MCSchedModel &SchedModel, const MachineInstr *DefMI) const {
>   if (DefMI->isTransient())
>     return 0;
>   if (DefMI->mayLoad())
>     return SchedModel.LoadLatency;
>   if (isHighLatencyDef(DefMI->getOpcode()))
>     return SchedModel.HighLatency;
>   return 1;
> }
>
>
> -Krzysztof
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>

I tried setting
let mayLoad = 1 {
  class InstrLD .... {
   }
}

But that didn't seem to work. When I looked at the debug output the latency
for the load instruction was set to 1.

However when I changed load itinerary description in the schedule to

def MyTargetItineraries :
    ..............
    InstrItinData<LD, [InstrStage<2, [BranchSlot, NonBranchSlot], 1>]>,
    ..............

That seem to produce correct latency in the debug output.

Do you know what could be the problem? Am I missing something? To give you
a full disclosure, I'm using LLVM 3.5 and at the moment I can't switch to
the latest version.

Any help is appreciated.


-- 
R
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151117/52d47324/attachment.html>