[llvm-dev] DFAPacketizer assert failure
Krzysztof Parzyszek via llvm-dev
llvm-dev at lists.llvm.org
Mon Nov 16 12:18:55 PST 2015
On 11/16/2015 2:08 PM, Rail Shafigulin wrote:
> It's hard to make a guess based on that assertion alone. Apparently
> there is no transition in the DFA for these values.
>
> Do the arguments (e.g. CurrentState and FuncUnits) look reasonable?
>
> FuncUnits = 0
> CurrentState = 0
> StateTrans = {first = 0, second = 0}
>
> I understand that there is something wrong with the state machine but I
> can't figure out what exactly. My scheduler description is the same as
> for Hexagon or R600. So why would DFA would look any different for my
> target? What could be the problem?
Does the instruction that is being added have an itinerary associated
with it?
I'm not sure what you mean when you say that your scheduler description
is the same as for Hexagon or R600. Those two are very different and
whatever you have, it cannot be the same as both of them.
-Krzysztof
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